Automatically assigned DDC number: 004358

Manually assigned DDC number: 00518

Title: Next Cache Line and Set Prediction

Author:

Author:

Subject: Brad Calder,Dirk Grunwald Next Cache Line and Set Prediction

Description: Accurate instruction fetch and branch prediction is increasingly important on today's wide-issue architectures. Fetch prediction is the process of determining the next instruction to request from the memory subsystem. Branch prediction is the process of predicting the likely out-come of branch instructions. Several researchers have proposed very effective fetch and branch prediction mechanisms including branch target buffers (BTB) that store the target addresses of taken branches. An alternative approach fetches the instruction following a branch by using an index into the cache instead of a branch target address. We call such an index a next cache line and set (NLS) predictor. ANLS predictor is a pointer into the instruction cache, indicating the target instruction of a branch. In this paper we examine the use of NLS predictors for efficient and accurate fetch and branch prediction. Previous studies associated each NLS predictor with a cache line and provided only one-bit conditional ...

Contributor: The Pennsylvania State University CiteSeer Archives

Publisher: unknown

Date: 1996-07-16

Pubyear: 1995

Format: ps

Identifier: http://citeseer.ist.psu.edu/140440.html

Source: http://www.cs.colorado.edu/~calder/papers/ISCA-95-NLS.ps

Language: en

Rights: unrestricted

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