Automatically assigned DDC number: 621395

Manually assigned DDC number: 621395

Number of references: 16

Title: Processor-Core Based Design and Test

Author:

Subject: Peter Marwedel Processor-Core Based Design and Test

Description: This tutorial responds to the rapidly increasing use of various cores for implementing systems-on-a-chip. It specifically focusses on processor cores. We will give some examples of cores, including DSP cores and application-specific instruction-set processors (ASIPs). We will mention market trends for these components, and we will touch design procedures, in particular the use compilers. Finally, we will discuss the problem of testing corebased designs. Existing solutions include boundary scan, embedded in-circuit emulation (ICE), the use of processor resources for stimuli/response compaction and self-test programs. I. Introduction In response to the increasing size of advanced chips and the continuing need for fast design cycles, a major amount of new designs is using complex cores (rather than standard cells and macroblocks) as building blocks. Such cores include: processor cores, communication cores, bus interface cores, and memory cores. These cores are available both from vendors...

Contributor: The Pennsylvania State University CiteSeer Archives

Publisher: unknown

Date: 1998-06-17

Pubyear: 1997

Format: ps

Identifier: http://citeseer.ist.psu.edu/184093.html

Source: http://ls12-www.informatik.uni-dortmund.de/publications/papers/1997-aspdactut.ps.gz

Language: en

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