Automatically assigned DDC number: 621395

Manually assigned DDC number: 621395

Number of references: 30

Title: Reconfigurable Computing: Architectures, Models and Algorithms

Author:

Author:

Subject: Kiran Bondalapati,Viktor K. Prasanna Reconfigurable Computing: Architectures, Models and Algorithms

Description: The performance requirements of applications have continuously superseded the computing power of architecture platforms. Increasingly larger number of transistors available on a chip have resulted in complex architectures and integration of various architecture components on the chip. But, the incremental performance gains obtained are lower as the complexity and the integration increase. Reconfigurable architectures can adapt the behavior of the hardware resources to a specific computation that needs to be performed. Computing using reconfigurable architectures provides an alternate paradigm to utilize the available logic resources on the chip. For several classes of applications, reconfigurable computing promises several orders of magnitude speed-up compared to conventional architectures. This article provides a brief insight into the architectures, models and algorithms which facilitate reconfigurable computing. 1 Introduction Microprocessors are at the heart of most curr...

Contributor: The Pennsylvania State University CiteSeer Archives

Publisher: unknown

Date: 2000-04-16

Pubyear: 2000

Format: ps

Identifier: http://citeseer.ist.psu.edu/295261.html

Source: http://www-scf.usc.edu/~bondalap/work/currsci.ps.gz

Language: en

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